发明名称 ADDRESS TABLE PREPARING CONTROL SYSTEM
摘要 PURPOSE:To decrease the overhead due to the change in the table by providing a converting register, a key register and a load table and changing two tables by one instruction operation. CONSTITUTION:When an address conversion is executed by a converting register TR 1, a logical address line 7 is selected by a selector 4, the inputted logical address is given to an address designating circuit 1a of the TR 1 and an actual address is read from the corresponding entry to a register 6. When a key register KR 2 is prepared, the KR 2 is simultaneously prepared when the TR 1 is prepared. WHen a load table LT instruction is executed and one entry is written into the TR 1, an actual address part, part of the data, is given through an actual address line 9 and a selector 5 to an address designating circuit 2a of the KR 2. Simultaneously, a key part, which goes to be a pair with the actual address part of the data, is inputted through a key line 10 to KR 2. Thus, respective entries of the KR 2 are written in accordance with the actual address given to the address designating circuit 2a.
申请公布号 JPS61210449(A) 申请公布日期 1986.09.18
申请号 JP19850051266 申请日期 1985.03.14
申请人 FUJITSU LTD 发明人 SAKAMOTO KAZUSHI
分类号 G06F12/10 主分类号 G06F12/10
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