发明名称 MANUFACTURE OF MIS TRANSISTOR
摘要 PURPOSE:To prevent deterioration of the characteristics of an element due to side etching of a gate insulating film, by removing an interlayer insulating film on the element by a lift-off method, and exposing the surface of an gate electrode without the etching of the gate insulating film. CONSTITUTION:After N-type source and drain 5 are formed, Al<-> is formed. By an Al etching process, Al 6 is formed as a mask at the time of lift-off, on a poly Si gate 4 and a gate oxide film 3. Then, an interlayer insulating film (e.g., SiO2) 7 is formed by a CVD method. By using HF, which is dilluted into water, SiO2 etching is performed. At this time, the part of the interlayer insulating film 7 on the edge of the Al 6 is thin in comparison with a flat part, and the thickness is 1,000-2,000Angstrom . Therefore, said part is removed in etching. A structure, in which the edge is exposed, is obtained for the Al 6. When Al etching using phosphoric acid is performed, the Al 6 and the interlayer insulating film 7 on the Al 6 are removed. When, e.g., boron ions are implanted, the impurity concentration of a channel region beneath the poly Si gate 4 is changed and VTH is controlled.
申请公布号 JPS61204972(A) 申请公布日期 1986.09.11
申请号 JP19850045454 申请日期 1985.03.07
申请人 SEIKO INSTR & ELECTRONICS LTD 发明人 KUDO NOBORU
分类号 H01L29/78;(IPC1-7):H01L29/78 主分类号 H01L29/78
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