发明名称 POLYGONAL LINE APPROXIMATION CIRCUIT
摘要 PURPOSE:To simplify the gain setting and adjustment and to facilitate bias setting of an output polygonal point voltage by deciding a gain between polygonal points with a resistor and adding a bias setting circuit. CONSTITUTION:A gain between optional polygonal points is decided by an optional gain adjusting resistor (R1-R4) with the provision of signal limiter circuits 31-33, an adder amplifier circuit 38 and subtraction circuits 39-41. Thus, the gain setting/adjustment is simplified. Further, a bias setting circuit 80 is added and its output is fed to the adder amplifier circuit 38. Thus, a bias voltage is added to each polygonal point voltage and the setting of the output polygonal point voltage is facilitated.
申请公布号 JPS61203713(A) 申请公布日期 1986.09.09
申请号 JP19850045354 申请日期 1985.03.07
申请人 MITSUBISHI ELECTRIC CORP 发明人 NISHIYAMA YUTAKA
分类号 G01D3/02;G01K7/14;G05B1/02;H03F1/32 主分类号 G01D3/02
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