发明名称 POLYGONAL LINE APPROXIMATION CIRCUIT
摘要 PURPOSE:To cancel an offset voltage and to set a bias voltage simultaneously by deciding a gain between polygonal points by one resistor and adding an offset voltage cancellation and bias voltage adding circuit. CONSTITUTION:The gain between optional polygonal points is decided by optional gain adjusting resistors R1-R4 through the provision of signal limiter circuits 30-32, an addition amplifier circuit 61 and subtraction circuits 37-39. Thus, the gain setting and adjustment are simplified. Further, the offset voltage cancellation and bias voltage adder circuit 74 is provided. Then an offset voltage generated in the circuits 30-32, the circuit 61 and the circuits 37-39 is cancelled and the bias of output polygonal points is set easily.
申请公布号 JPS61203712(A) 申请公布日期 1986.09.09
申请号 JP19850045353 申请日期 1985.03.07
申请人 MITSUBISHI ELECTRIC CORP 发明人 NISHIYAMA YUTAKA
分类号 G01D3/02;G01K7/14;G05B1/02;H03F1/32 主分类号 G01D3/02
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