| 摘要 |
PURPOSE:To enable a semiconductor device to be made small-sized by allowing the space between the main electrode region and the inactive region of the control electrode region to be determined in self alignment by the thickness of the insulation layer. CONSTITUTION:An N<+> buried layer 32 and a P buried region 33 are formed on a P-type silicon substrate 31, an N-type silicon layer 34 is grown thereon, and an isolation oxide film 35 is formed by patterning a nitride film. After removing the nitride film, a mask material is applied, an opening portion is provided by patterning, boron ions are struck into, and heat treatment is performed, thereby forming a P-type base region 37, and polysilicon 38 is deposited. Then, an N-type impurity is diffused to form polysilicon 39 and polysilicon 40, and oxidation is performed to form thick oxide films 41 and 42 on the polysilicons 39 and 40 and a thin oxide film on the base region 37. The thin oxide film on the base region 37 is removed, then polysilicon 43 is deposited, boron ions are implanted, and etching-back is performed. After patterning this, thermal oxidation is performed, and finally emitter electrode metal 48, base electrode metal 49 and collector electrode metal 50 are vacuum deposited, respectively. |
