| 摘要 |
PURPOSE:To obtain a reset signal having a sufficient length at power-on by using an output signal of a flip-flop as a reset signal until an input signal inverts an output of the flip-flop from the power-on. CONSTITUTION:Since a potential at a set input terminal 4 of an FF 2 is at a low level at power-on, an output signal 6 goes to a high level. A signal going to a low level for some time after power-on is inputted to a reset input terminal 5 of an FF 1. Then the output signal 6 of the FF 2 keeps a high level until an input signal 7 at the terminal 5 goes to a low level. The high level signal kept in the FF 2 is applied to the inside of the LSI as the reset signal. Thus, a reset signal having a sufficient length is obtained at power-on.
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