Conductivity-enhanced combined lateral MOS/bipolar transistor

摘要

A combined lateral MOS/bipolar transistor includes an intermediate semiconductor layer of the same conductivity type as the channel region which extends laterally from the channel region to beneath the drain contact region of the device. Additionally, a floating semiconductor layer of opposite conductivity type to that of the channel region is provided between the intermediate layer and the substrate of the device. Both the intermediate layer and the substrate are relatively lightly doped, to effectively isolate the floating layer from above and below. This structure substantially improves the operating chartacteristics of the device, thus permitting operation in both the source-follower and common-source modes, while also providing a compact structure which features a relatively low normalized "on" resistance.