| 摘要 |
PURPOSE:To reduce a collision of a signal, and to raise the transmission efficiency by resetting a value of a clock adder, when a signal is detected, and executing a data transmission, only when the value of the clock adder is equal to a value of an intrinsic number setting part. CONSTITUTION:A clock adder 6 adds a value by one each at every two times of the maximum propagation delay time of a transmission line 8, and resets the value, when it becomes a larger number than the number of signal transmission devices connected to the transmission line 8. Only in case when a receiving part 3 has detected a signal through a signal detecting part 9, a signal is sent to a transmission and reception control part 4. When the signal is received, the transmission and reception control part 4 resets the value of the clock adder 6, and checks again whether the signal exists on the transmission line 8 or not. Said operation is repeated until it becomes impossible to detect the signal on the transmission line 8, and when it becomes impossible to detect the signal, the transmission and reception control part 4 reads out and compares values of the clock adder 6 and an intrinsic number setting part 7. When the values are equal, the transmission and reception control part 4 makes a transmitting part 2 start a data transmission to the transmission line 8 through a signal detecting and sending-out part 9.
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