发明名称 MULTIPROCESSOR SYSTEM
摘要 PURPOSE:To shorten the access time by making it possible that a processor monopolizes shared resources when a multiprocessor system is degenerated to a single processor constitution. CONSTITUTION:If a processor 1 accesses a shared memory 4 when a processor 2 is not operated and only the processor 1 is operated, '1' is outputted from a signal line 1-9, and a bus use request is not outputted through a signal line 1-2; but if a signal line 8 is in the '0' state, a gate 1-10 is opened by gates 1-6 and 1-7, and an internal bus 1-4 and the shared bus 5 are connected, and the shared memory 4 is accessed unconditionally. When a device 3 accesses the shared memory 4, it issues the bus use request through a signal line 3-2. A bus control circuit 6 receives this signal and selects the device 3 by a competition circuit 6-1.
申请公布号 JPS61187067(A) 申请公布日期 1986.08.20
申请号 JP19850026247 申请日期 1985.02.15
申请人 HITACHI LTD 发明人 TAKI YOSHIHARU
分类号 G06F13/36;G06F13/16;G06F15/16;G06F15/177 主分类号 G06F13/36
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