| 摘要 |
PURPOSE:To prevent the omission of the character pattern data and to fetch correctly the memory into the memory by using either of an FC pulse signal or an external pulse signal obtained by detecting a framing code (FC) signal as the timing pulse signal to show the fetching starting time, when the character pattern data are fetched. CONSTITUTION:An FC signal is detected at an FC detecting circuit 4 and supplied to an OR gate 6 as an FC pulse signal. On the other hand, the completely same external pulse signal as the FC pulse signal is applied through an external pulse signal input terminal 5 to the OR gate 6. The OR gate 6 obtains OR with the FC pulse signal and the external pulse signal as an input, and the output is supplied to a flip-flop 7. Next, at the flip-flop 7, a gate signal occurs at the rear end of the output signal of the OR gate 6 and is supplied to an AND gate 8. At the AND gate 8, a sampling clock signal and the gate signal are gated, and supplied to a frequency dividing circuit 11 as a clock signal. |
