| 摘要 |
PURPOSE:To attain control with high grade and simple data transmission by using sweep information of a counter to drive a switch circuit thereby flowing a current to a heat resistor for a time corresponding to a required recording density. CONSTITUTION:A clock signal CLK2 consists of 2<n> sets of pulse train having a period of t/2<n> (t is maximum print pulse width) and a counter 71 starts inputting the CLK2 and count down. When it is supposed that the content of a shift register group 101 is 2 and the information is preset to the counter 71, the counter 71 uses two pulses of the CLK2 and outputs an L signal from a terminal RCY. A FF81 brings the level of Q to L while receiving this signal and a switching element 31 is turned off. Further, a gate 111 is closed and the input to the counter 71 of the CLK2 is inhibited. The state is kept since the next STROBE signal is applied. That is, the print pulse is applied to the heater for t/2<n>X2 to the content of the register 101. |
