| 摘要 |
PURPOSE:To execute a high speed multiplication containing continuous '0' and having large bit length by providing a plier for counting the number of '0' of the low order of a multiplier register, and a barrel shifter for bringing the contents of the multiplier register to a multistage shift. CONSTITUTION:The contents of a multiplier register 2 are multiplied by a plier 11, the number of '0' of the low order of the multiplier register 2, and an accumulator 1and the contents of the multiplier register 2 are brought to multistage connection and shifted by a barrel shifter 12 by the number of outputs of the plier 11. An output of the barrel shifter 12 is divided into the low-order (n-1) bit 14 except the '0'-th bit and the high-order (n) bit 13. The low-order (n-1) bit is stored in the low-order (n-1) bit of the multiplier register 2, and the high-order (n) bit is brought to the sum with the contents of an auxiliary register 3 by an adder, and becomes a carry output 6 and a sum output 5. The carry output 6 and the sum output are stored in the most signifi cant (n-1)-th bit and the lower (n-1) bit, respectively, in the same way. |
