SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR INSPECTING THE SAME

摘要

PURPOSE:To enable data retention defect to be easily detected by arranging so that the write voltage is applied to a word line with each data line of the memory cell at a low level potential and reading is made to the data line with the word line maintained at a low level potential to enable a potential to be impressed. CONSTITUTION:An X decoder XD controlling a word line WL of a memory cell MC and an X-address circuit XA are provided with an address control circuit AC so as to control the write voltage to a feed line WL and a low level potential. By this, the write voltage is applied to the word line WL while the data line DL is maintained at a low level potential and left as it is to effect inspection of the defective memory cell without information writing in each memory cell MC. It is also possible to inspect the memory cell MC at a low threshold value voltage state by impressing a required voltage to the data line DL while the word line WL is maintained at a low level potential.