发明名称 VIDEO SIGNAL PROCESSOR CIRCUIT
摘要 A video signal processing arrangement comprises an input (1) for receiving an input video signal and output (2) at which the processed signal is produced. The arrangement includes a vertical filter (3), a horizontal filter (4), a vertical interpolator (5) a horizontal interpolator (6), a field store (7) and a control circuit (8). The control circuit (8) produces control signals which are fed via paths (20,21,22) to the vertical and horizontal interpolators (5,6) and the field store (7) to re-configure their positions in the signal processing chain in dependence on whether the television picture represented by the input video signal is to be squeezed or zoomed.
申请公布号 JPS60235585(A) 申请公布日期 1985.11.22
申请号 JP19850085576 申请日期 1985.04.23
申请人 PHILIPS' GLOEILAMPENFABRIEKEN NV 发明人 ATOMA HEERAA
分类号 G06T3/40;G09G5/00;H04N5/262;H04N5/44;H04N7/26 主分类号 G06T3/40
代理机构 代理人
主权项
地址