| 摘要 |
<p>A digital chrominance signal processing system for processing an input digital composite chrominance signal (DC(n)), which is sampled with a sampling signal having a frequency of 2 mfs wherein m is an integer and fs is a sampling frequency, having a decoder (30) for decoding the input digital composite chrominance signal (DC(n)) into digital chrominance components (DS<Sub>1</Sub>(n), DS<Sub>2</Sub>(n)), the decoder (30) including an inverter (32) for inverting the input digital composite chrominance signal (DC(n)) and switching means (33; 33-35; 33, 36) for selectively switching the input digital composite chrominance signal (DC(n)) and an output (<Overscore>DC</Overscore>(n)) of the inverter (32).</p><p>After transmitting said digital chrominance components (DS,(n), DS<Sub>2</Sub>(n) an encoder (40) may encode them to provide an output digital composite chrominance signal (DC'(n)), the encoder (40) comprising either multiplying means (43, 44) for multiplying said transmitted components (DS, (n), DS<Sub>2</Sub>(n)) with an encoder carrier of predetermined initial phase (θ<Sub>2</Sub>) and a combination means (47) for combining said multiplied components or an inverter (49) for inverting said transmitted components and a switch means (37, 50) for selectively switching the transmitted components (DS,(n), DS<Sub>2</Sub>(n)) and an output of the inverter (49) in a predetermined phase relation to the switching within the decoder (30).</p> |
