发明名称 PROCESSOR DEVICE FOR COMMUNICATION CONTROL
摘要 PURPOSE:To attain high speed data processing without changing firmware by providing a normal data judging circuit that judges whether the data are more than 4 bytes or not and a final data judging circuit that judges whether the data are final or not. CONSTITUTION:Data are inputted from a circuit through a signal line 5, and a normal data judging circuit 3 judges whether the data are more than 4 bytes or not. When data of more than 4 bytes are inputted, the body 1 of a processor for communication control collects data of 32 bits together by 4 byte collective data transfer processing of firmware and transfers to a high-order processor 2. When the inputted data are judged as less than 4 bytes by the circuit 3, and judged to be not final data by a final data judging circuit 4, the body 1 does not transfer the data and makes other communication control process. When it is judged that inputted data are less than 4 bytes and final data, the body 1 assembles the data by 1 bite data transmission processing of firmwares the data to the processor 2.
申请公布号 JPS61177844(A) 申请公布日期 1986.08.09
申请号 JP19850018330 申请日期 1985.02.01
申请人 NEC CORP 发明人 SHINOHARA SATOSHI
分类号 H04L29/02;G06F13/00;H04L13/00 主分类号 H04L29/02
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