| 摘要 |
PURPOSE:To enable deletion of non-display time that accompanies simultaneous display and changing of a parallel projection graphic and a two-plane development graphic of the same three-dimensional graphic by providing individual video RAM and a display graphic setting section for each graphic. CONSTITUTION:Three-dimensional graphic data from a main CPU1 are inputted to a graphic control section 3 through a graphic processing section 2, and after changed to concrete graphic data, outputted to a write erasing circuit 4. The circuit 4 changes the data to hardware information and separates into data for parallel projection graphic and data for two-plane development graphic and stores in a video RAM for parallel projection graphic 5a and a video RAM for two-plane development graphic 5b. A display graphic setting section 7 outputs display designation signals to a video signal generating section 6 according to the content of display command from the CPU1. The generating section 6 reads out data from either RAM5a or 5b or from both and converts to video signals. Thus, simultaneous display of the two graphics is made possible and at the same time, non-display time caused by changing can be deleted.
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