| 摘要 |
<p>PURPOSE:To adjust its recording density without placing any load on a control side such as an arithmetic processing circuit by providing plural gate means corresponding to plural recording elements and a means which adjusts opening/closing periods of the gate means. CONSTITUTION:The gate opening/closing adjusting circuit shown in a figure is provided in front of the AND gates corresponding to the recording elements. When an enable signal 10 is at L, a TRQ1 turns on and the output of a comparator 18 falls to L. Consequently, the output 11 of a NOR gate 20 goes down to L and enabling becomes ineffective. Then when the signal 10 is at H, the TRQ1 turns off and a current flows to an external capacitor CK through an external resistance RK at the same time, so that the potential VB at a point B rises. This rise is determined by the time constant of the resistance RX and capacitor CX. When VB=Vcomp, the output of the comparator 18 is inverted and the output 11 goes up to H, so that an enabled state is entered. The time constant tCR in said inversion varies as a linear function of RX. When the output of the comparator 18 is inverted with the time tCR, the level at a point C goes up to H and the output 11 falls to L. In this case, the signal 10 should be much larger than the maximum value of tCR. Thus, the print density is varied by varying the value of the tCR through the resistance RX.</p> |
