发明名称 CIRCUIT FOR SEPARATING AND CORRECTING SYNCHRONIZING INFORMATION
摘要 PURPOSE:To eliminate a synchronization detecting error and to improve the reliability of corrected synchronization information by removing a signal errone ously separated together with synchronization information, which is caused by noise, etc., and supplementing omitted synchronization information. CONSTITUTION:When a clock signal WCK generated on the basis of a signal available from delaying arbitrarily a gated synchronization information GHS is inputted from a terminal, oscillation is stopped during a horizontal blanking period, but the oscillation except said case continues. If the normal horizontal synchronization information is omitted, horizontal synchronization information is not outputted from an AND circuit 12, and during the horizontal blanking period the clock signal is not stopped. Since a correcting signal CO is outputted so that a counter circuit 50 can start the counting of the clock signal WCK, a signal can be processed in spite of the omission of the synchronization information.
申请公布号 JPS61171285(A) 申请公布日期 1986.08.01
申请号 JP19850010869 申请日期 1985.01.25
申请人 HITACHI LTD 发明人 OWASHI HITOAKI;FURUHATA TAKASHI
分类号 H04N5/08;H04N5/92;H04N5/93 主分类号 H04N5/08
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