| 摘要 |
PURPOSE:To perform related arithmetic with high accuracy and to attain the arithmetic processing with exclusive hardware, by obtaining easily the number of relation codes with which the arithmetic conditions are satisfied. CONSTITUTION:The U buffers 20U and 20L are provided to an arithmetic part OPP of a related arithmetic processor for storage of the 1st and 2nd relations. Then an MOP register 39 set in a main control part 38 of a control part CNTP designates a merge operation. While a command data on the merge operation is set to a command register 41 connected to a CPU. A comparator 23 compares the data read out of both buffers 20U and 20L with each other and at the same time these data are stored in output registers 24U and 24L respectively. The outputs of the registers 24U and 24L are applied to a URB buffer 36U and an LRB buffer 30L of an output selection part OSP. The data equivalent to a record is written to the buffers 30R and 30L respectively. Then the CPU knows easily the relation codes with which the arithmetic conditions are satisfied and performs the related arithmetic with high efficiency.
|
