| 摘要 |
PURPOSE:To reduce the number of required registers to perform the processing at a high speed by adding the start address of a stack on a memory and a relative address designated by a tag as a data classification to write them in the start of the stack. CONSTITUTION:An 8-bit ALU22, a TOS holding register 23, a two-port register 29, a 32-bit ALU26, and a two-port register 28 are provided between 40-bit input signal lines 20 and 21 and an output bus signal line 32, and an adder 25 which updates TOS and a selector 24 are provided for the register 23, and either of outputs of the register 23 and the ALU26 is selected by a selector 27. Data consists of an 8-bit tag part and a 32-bit data part, and data from data signal lines 15, 16, and 17 or the register 29 is calculated by the ALU22 to obtain the tag part, and data from signal lines 15-17 or the register 28 is calculated by the ALU26 to obtain the data part.
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