| 摘要 |
PURPOSE:To omit a reset timing signal generating circuit to attain the simple constitution of the titled resetting circuit and at the same time to shorten the resetting time, by adding an AC reset current synchronizing with a power supply to a DC reset current. CONSTITUTION:A driver gate 20 is switched by the signal current given from a decoder circuit 28 which is slower than the rise of a power supply. Then a loop current IL is supplied to a Josephson driver loop circuit 29. Thus, at this time point, an AC reset current IAC synchronizing with the power supply of a reset gate 25 receiving a reset DC current IDC has a satisfactory rise. Then the current IL of a loop 24 having no resistance is held by an addition reset current with the gate 25 having no switching action. When a current IAC has a fall, the gate 25 has a switching action by the current IDC and has high resistance. Thus the loop 24 is reset. A reset timing signal generating circuit is omitted with use of an AC reset current synchronizing with the power supply of the gate 25. This simplifies the constitution of a resetting circuit and also shorten the resetting time.
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