发明名称 CHARACTER-GENERATING CIRCUIT
摘要 PURPOSE:To provide a character-generating circuit capable of high-speed processing, by intermediately providing a FIFO storage means between an input-controlling means for reading bit data and an output-controlling means for outputting the data. CONSTITUTION:Where there is room in a memory, a signal IR indicating that data can be inputted is sent from a FIFO RAM 19 to a timing-controlling part 17, and one-byte data sent from a font memory through a text buffer part 12 are sequentially written. when data to be outputted are present, a signal OR is sent from the FIFO RAM 19 to an output-controlling part 16, and on receiving an output demand signal UNCK from the part 16, the FIFO RAM 19 outputs the one-byte data FIFOO.7 in the order in which the data are written. Accordingly, printing data are written into the FIFO RAM 19 as soon as room is generated in the memory, that is asynchronously with the transfer of data to a printer.
申请公布号 JPS61158473(A) 申请公布日期 1986.07.18
申请号 JP19840281252 申请日期 1984.12.28
申请人 MINOLTA CAMERA CO LTD 发明人 NISHIYAMA MASAAKI;MONNO TAKASHI
分类号 G06F3/12;B41J2/485;G06K15/10;G09G1/00;G09G5/28 主分类号 G06F3/12
代理机构 代理人
主权项
地址