发明名称 ADDRESS RECORDING AND REPRODUCING DEVICE
摘要 PURPOSE:To retrieve correctly a desired data from a video tape by providing a multi-path generating circuit, an address/data recognition circuit and a means deciding a logical value of a split bit string. CONSTITUTION:The multi-path generating circuit 2 coverts a 1-bit data of logical 1 into an n-bit data of logical 1 and converts a 1-bit data of logical 0 into an n-bit data of logical 1. A digital data outputted from an OR circuit 3 is converted into an analog data of the standard television form, fed to a video head 5 and written on a video tape. The analog data read from the video tape is converted into a digital data and inputted to the address/data recognition circuit 7. A filter circuit 8 divides a bit string fed from the circuit 7 at each n-bit, divides the divided bit string at each n-bit, average the divided bit string and when the average value is larger than a prescribed value, it is discriminated as logical 1 and when the average value is less than the prescribed value, it is discriminated as logical 0, and the result of discrimination is fed to a latch circuit 9. The bit string outputted from the latch circuit 9 represents an address data.
申请公布号 JPS61158076(A) 申请公布日期 1986.07.17
申请号 JP19840281034 申请日期 1984.12.28
申请人 PANAFACOM LTD 发明人 YOSHIZAKA ISAO
分类号 G11B20/12;G11B20/10;G11B20/18 主分类号 G11B20/12
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