| 摘要 |
PURPOSE:To equip a device with high sensitivity in its gate trigger feature under the III(+) mode by a method wherein a third surface layer is formed on the ground surface to partially overlap the portion just under a first surface layer and a second intermediate layer adjoining the third surface layer at the side of the first surface layer is made to be lower in impurity concentration than a second intermediate layer exposed portion adjoining the third surface layer. CONSTITUTION:A first intermediate layer adjoining a TRIAC first surface layer NE1 at the side of a third surface layer NE2 is lower in impurity concentration and shallower in depth of diffusion than a first intermediate layer exposed portion P1 adjoining the first, second surface layers NE1, NE2. A second intermediate layer adjoining a thirs surface layer NE2 at the side of the first surface layer NE1 is lower in impurity concentration and shallower in depth of diffusion that a second intermediate layer exposed portion P2. On the surface of the substrate, a first main electrode T1 and gate electrode G are provided, respectively bridging the first surface layer NE1 or second surface layer NEG and the first intermedaite layer exposed portion P1 and, on the other surface of the substrate, a second main electrode T2 is provided, bridging the thirs surface layer NE2 and second intermediate layer exposed portion P2. |
