| 摘要 |
PURPOSE:To enable high-speed action by reducing the wiring capacitance by a method wherein an impurity diffused region is formed immediately under an element isolation layer provided with a wiring layer, and an impurity diffused region for inversion prevention is formed around it. CONSTITUTION:An element isolation layer 2 is formed at the element isolation region of a semiconductor substrate 1, and an impurity diffused region 11 of low impurity concentration is formed immediately thereunder. An impurity diffused region 12 of the first conductivity type and high impurity concentration is formed around the impurity region 11, an an impurity region 13 of the second conductivity type and high impurity concentration is formed immediately under the impurity region 11. Such as a construction enables a marked reduction in the depletion layer capacitance C2 because of a low impurity concentration under the element isolation layer 2 and the security of high-speed action by reducing the wiring capacitance C. When the impurity concentration is low, it means that the absolute value of the difference between holes and electrons is small, but does not mean that the number of donors, acceptors, or the sum of donors and acceptors is small. |
