摘要 |
PURPOSE:To replace mutually the sequence of channel data by furnishing a write controlling part which controls the writing of data in the memory and a channel pulse converting part that outputs a channel pulse of the channel correspondent to the data read out from the memory. CONSTITUTION:The write controlling part 9 writes in the memory part 3 the data shown in figure (1) of (d). In such a case, in address 12, the same data as in address 1 is written. If addresses 1, 2...24 are sequentially outputted from a time sequential address generating part 2, the sequential channel pulses P1, P2... are transmitted to channel panels CH1, CH2... from a channel pulse converting part 4 on the transmitting part. Because decimal one (a) is written in the address 12, a channel pulse is transmitted to the channel panel CH1, and the primary frame in which the data outputted from the same channel panel CH1 is arranged is outputted from a multiplexer part 1 to time slots TS1 and TS12. The channel-data sequence thus can be replaced mutually and optionally by rewriting the content of the memory without altering the hardware. |