发明名称 SYNCHRONOUS SIGNAL EXTRACTING CIRCUIT
摘要 PURPOSE:To obtain a correct signal being removed noise by forming a window signal relative to a synchronous signal based on a counting value corresponding to an average cycle of a synchronous signal. CONSTITUTION:A reproducing synchronous signal S1 conducting to an input terminal 1 is supplied to an input gate circuit 2, resets a cycle counter 4 and the counter 4 counts up a clock CLK till a next signal. A count value D1 of this counter 4 is compared with an average count value D2 of a horizontal cycle near to a latch circuit 13 in respect of a largeness in a comparison circuit 5. When D1<D2, a setting value obtained from a setting change over circuit 9 is added to the output value D2 of the latch circuit 13 as it is. When D1>D2, the setting value is subtracted from the latch output value D2. A value to be latched finally shows a cycle of an average reproducing horizontal synchronization signal, is added to a window value D4 giving an allowance and an added value D5 is supplied to a window signal generating circuit 15. A window signal S7 is fed to a window gate circuit 16, a signal S2 is gated and a correct horizontal synchronization pulse S8 of a constant time duration is obtained.
申请公布号 JPS61156977(A) 申请公布日期 1986.07.16
申请号 JP19840281595 申请日期 1984.12.27
申请人 SONY CORP 发明人 TADAMI MITSUSHIGE;NAKADA TETSUO
分类号 H04N5/10 主分类号 H04N5/10
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