| 摘要 |
PURPOSE:To make the area of the electrode of a capacitor relatively large even in a high-density integrated device, by providing a three-dimentional structure for a memory cell. CONSTITUTION:In a silicon substrate forming a memory cell, an SiO2 film 2, which is to become a dielectric film for a capacitor, an n<+> type crystal region 5 and a P-type single crystal region 4 are laminated on a poly-crystalline region 1, which functions as a cell plate and in which impurities are introduced. Grooves 5 and 6 are formed in the surface of the substrate, and polycrystalline silicon layer word lines 7 are embedded. An MOS transistor is formed by the word lines as gate electrodes and the source and drain comprising an n<+> region 8, which is formed on the n<+> type single crystal region 3 and the surface of the substrate. The n<+> region 8 is connected to a bit line 9. A parallel flat-plate capacitor is formed by the n<+> type single crystal region 3, the cell plate 1, and the dielectric film comprising the SiO2 film 2. |
