发明名称 PICTURE ENLARGING AND REDUCING CIRCUIT
摘要 PURPOSE:To obtain enlarged or reduced images having high quality without the generating of moires by changing the number of processing bits on the basis of a picture element size and an enlargement or reduction rate which respect to spurious half tone data. CONSTITUTION:The reduction or enlargement rate is set to a register 19, and an initial value '0' is set to a register 20. In case of reduction in the main scanning direction of the spurious half tone data, a sequencer 18 generates m-number of clocks at every respective one clock of shift clock signals 15 and 16 when a carry signal 24 is generated. When the signal 24 is not generated, the sequencer 18 generates m-number of clocks of only the signal 15. In case of enlargement of the spurious half tone data, the sequencer 18 outputs m- number of clocks of each of clock signals 15 and 16 to transfer and copy m-bit contents of the resister to a register 13 when the signal 24 is not generated. When the signal 24 is generated, the m-bit contents of the register are shifted to the register 13, and the same contents are inputted to the register 13 again.
申请公布号 JPS61152162(A) 申请公布日期 1986.07.10
申请号 JP19840280790 申请日期 1984.12.25
申请人 FUJI XEROX CO LTD 发明人 KUMAZAWA YUKIO
分类号 H04N1/393;G06T3/40 主分类号 H04N1/393
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