发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To minimize the increase in area occupied by wiring regions of a chip even if the chip is made in a larger size, by composing cell columns in the central portion of the chip, of basic cells provided with one or more regions to be passed through by a wiring layer. CONSTITUTION:A chip is wired with two metal wiring layers on condition that an element region 1 and a wiring region are wired with the first and second metal layers while the first metal layer is used in the longitudinal (vertical) direction and the second metal layer is used in the transverse (horizontal) direction. Two types of basic cells 4, namely the basic cells having one or more regions to be passed through by the second metal layer and the basic cells having less such regions are prepared. For defining an element region 1, one or more columns of cells in the central portion of the chip are composed of the former type of basic cells arranged vertically while one or more columns in the right-hand and left-hand portions of the chip are composed of the latter type of cells arranged vertically.
申请公布号 JPS61139044(A) 申请公布日期 1986.06.26
申请号 JP19840260681 申请日期 1984.12.12
申请人 TOSHIBA CORP 发明人 HIWATARI TAMOTSU
分类号 H01L21/822;H01L21/82;H01L27/04;H01L27/118 主分类号 H01L21/822
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