发明名称 MOS INTEGRATED CIRCUIT
摘要 PURPOSE:To enable the reduction of the intervals among wirings by connecting a source wiring with one of rising layers through a diffusion layer of the second conductive type, and another rising with a source of a MOS transistor. CONSTITUTION:A potential of a source 1 of a transistor can be given with a low resistance from a source wiring 6 through a rising layer 13a, a buried layer 12, a floating layer 13b, and a region of the source 1. Only by forming an insulating layer 9 right under a passing wiring 4 (4a, 4b, and 4c), the wiring made of polysilicon becomes available for the passing wiring 4 besides that of a metal. This circuit is composed of the source wiring 6 with is connected with one of two rising layers of the second conductive type having a high impurity concentration which are arranged on the both ends of the buried layer through the diffusion layer of the second conductive type, the diffusion layer forming the source of a MOS transistor connected with another of said rising layers, a gate electrode 3 consisting of polysilicon, and a drain region 2 forming a MOS transistor. As a channel is not formed in the source region, polysilicon can be used for a passing wiring and design of a pattern becomes easy, and further the whole circuit can be miniaturized.
申请公布号 JPS61135142(A) 申请公布日期 1986.06.23
申请号 JP19840258658 申请日期 1984.12.05
申请人 MITSUBISHI ELECTRIC CORP 发明人 HARADA TAKASHI
分类号 H01L29/78;H01L21/3205;H01L23/52 主分类号 H01L29/78
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