Processing of machine code instructions - using instructions with two part operation code, first being of normal structure and second acting as virtual operation code

摘要

A data processing system is structured to enable machine code instructions to be readily generated when operating with either of two types of languages, i.e. high level languages or reduced instruction set languages. The central processor operates together with a specific register format consisting of general registers (RO-R7), a zero's register (8), a one's register (9), a program counter (PCR), a stack pointer register (SPR), a condition code register (CCR), and a sign extend register (SER). In addition to the standard registers there are an interpreter programme counter register (IPLR) and an operation extend register (OPER) that provide the necessary facilities for machine code conversion. The instruction words used in the system consist of an operation code and an operand. The operation code is in two part format, with the first part being of a normal structure and the second part acting as a virtual operation code to facilitate the conversion.