发明名称 SAMPLE HOLDING CIRCUIT
摘要 PURPOSE:To execute the secure, highly speedy and highly accurate sample holding with a simple constitution by installing an input transistor group, a transistor group for controlling to charge and discharge the capacitor, and a feedback transistor group. CONSTITUTION:By a switch control circuit 33, a switches 12, 14 are on, input side N type and P type transistors 10 and 11 are on, a buffer amplifier action is executed to an input signal I impressed to the base, N type and P type transistors 17 for controlling to charge and discharge the capacitor, a capacitor 25 goes to be a charging condition and the signal I is sampled. Next, when the switches 12 and 14 are off and 19 and 21 are on by the circuit 33, transistors 10, 11, 17 and 18 are off, and the capacitor 25 holds a sample electric potential. In accordance with the holding electric potential, transistors 29 and 30 for feedback are on, an emitter electric potential of the transistors 10 and 11 is prescribedly fixed, the change of the holding electric potential of the capacitor 25 is prevented, and the secure, highly accurate and highly speedy sample holding is executed with a simple constitution.
申请公布号 JPS61126695(A) 申请公布日期 1986.06.14
申请号 JP19840246509 申请日期 1984.11.21
申请人 TOSHIBA CORP 发明人 SUGIMOTO YASUHIRO
分类号 G11C27/02 主分类号 G11C27/02
代理机构 代理人
主权项
地址