| 摘要 |
PURPOSE:To reduce greatly the defect generation factor of an EPROM comparatively low in reliability and to improve the reliability of a control system, by copying an EPROM to an RAM in the early stage of application of a power supply or when an error is detected, and always cutting off the power supply of the EPROM by using said copied one in the execution mode of a program. CONSTITUTION:When an error is detected, an error signal is outputted from an error check circuit 10. Then a flip-flop 2 is set via an OR circuit 13, and a local power supply circuit 3 is turned on like the early stage of application of a power supply. Then data are copied to a RAM6 from an EPROM4. Meanwhile, the CPU holding signal is supplied to a CPU by the output of the flip-flop 2. The AND circuits 14 and 15 and an inverter 16 decide whether the CPU is reset or held by making use of a fact that the error signal is not active yet in the early stage of application of the power supply. |
