发明名称 MEDIUM ACCESS CONTROL SYSTEM
摘要 PURPOSE:To relieve the load of the CPU by defining a repeating status, token- holding status, and a token-sending status at each node and by performing the state transition by TPC-dedicated hardware independently without control by the CPU. CONSTITUTION:A token passing controller (TPC)10 is included in an adapter of each node, and inputs transmission data 600 in the repeating status. The controller 10 also stores the processing result from an MPU20 in an RAM40 after transferring the data by DMA (direct memory access) to a receiving buffer 50 without the controlling by the MPU20. Data to be transferred is transferred by DMA to the transmit/receiving buffer 50, and is made in transmission-ready status. If a token is transferred from other node, the TPC10 controls so that the repeating status transits to the token-holding status. And at the time when the transmitting of the transmit frame from the transmission buffer 50 is finished, the TPC10 controls so that the status transits to the token-transmitting status. And it finally sends the token, and further and again performs the control to transit to the repeating status by detecting the last byte of the frame.
申请公布号 JPS61125253(A) 申请公布日期 1986.06.12
申请号 JP19840245753 申请日期 1984.11.20
申请人 FUJITSU LTD 发明人 SUZUKI HIDEO
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