| 摘要 |
PURPOSE:To eliminate the need for the external application of a test pattern and for checking an output pattern by adding a hardware for a simple test deciding a logic independently of the logic to be realized by the titled circuit. CONSTITUTION:Short-circuit of AND between decode lines 11 and 12, a degeneration fault of an output line 22, and AND short-circuit fault between an output line 22 and an output line of a 2-input exclusive OR gate 51 are detected respectively by patterns 11, 12, a pattern 42 and a pattern 41. Further, the AND short- circuit fault of the decode line 12 is detected that '0' error takes place to the decode line 12 under the pattern 11 and an effect is imposed on the final pattern by using product term lines 70, 77, 78 or realizing a logic expressed in equation at a feedback signal generating circuit 6. One degeneration fault of the output line 22 gives effect on the final pattern by changing the input to a parity circuit 5 under the pattern 51. The AND short-circuit fault between the output line 22 and the output line of a 2-input exclusive OR gate 51 gives effect on the pattern 51. |
