| 摘要 |
PURPOSE:To reduce the number of fuses and to reduce the area of a ROM by employing a memory monoblock having one fuse per bit for the ROM for storing the address of a defective cell in a semiconductor memory device with a redundant cell and inputting outputs of all memory monoblocks to an error correcting circuit. CONSTITUTION:ROMs 00-39 are memory monoblocks for storing a defective address and have fuses Fs 00-39 per bit, respectively, while outputs RSs 00-39 are defective addresses of two rows and two columns. ROMs 40-46 are memory monoblocks for storing error correcting codes RSs 40-46 with respect to the defective addresses RSs 00-39, and have the same constitution as that of the memory monoblock for storing a defective address. With the outputs RSs 00-46 of all memory monoblocks ROMs 00-46 as an input, the error correcting circuit ECC 81 outputs defective addresses RS's 00-39 of 40 bits, which correct one-bit error, and a signal ES for showing the occurrence of one-bit error.
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