| 摘要 |
PURPOSE:To increase an operation speed by arranging mixedly a basic circuit cell for constituting an NTL circuit and a basic circuit cell for constituting an ECL circuit at the internal logical part of a master slice LSI, and composing a circuit of complex logical constitution of the ECL circuit. CONSTITUTION:A rectangular internal logical part 1 arranged nearly in the center of a semiconductor substrate consists of a non-threshold logical (NTL) part 1a and emitter-coupled logical (ECL) parts 1b and 1b. The 1st basic circuit cells 11 where necessary numbers of transistors (TR) and resistances for the NTL circuit are formed are arranged in a lattice shape at the NTL part 1a. Further, the 2nd basic circuit cells 12 where necessary numbers of TRs and resistances for the ECL circuit are formed are arranged at the ECL parts in a lattice shape. In this master slice LSI, circuits of complex circuit constitution such as a decoder and an FF are constituted by using basic circuit cells 12 in the ECL part 1b and other parts whose logical constitution is not complex are constituted by using basic circuit cells 11 in the NTL part 1a. |
