| 摘要 |
PURPOSE:To avoid the throughput deterioration of a CPU even in case a large quantity of data are transferred to a memory from a peripheral device, by attaining the simultaneous accesses to different memory areas from plural devices. CONSTITUTION:The part of a memory 305 is divided into memory areas (banks 0-N) where the accesses are possible independently of each other from a CPU301 and the peripheral device 302 and addresses are continuous. A selection circuit 304 is provided to each memory bank to perform switching between the signal line led from the device 302 and that led from the CPU301. A memory access control circuit 303 monitors the accesses given to the same memory bank from the CPU301 and the device 302 and set one of them under a waiting state according to the priority when an access conflict is produced.
|
