发明名称 MANUFACTURE OF FET
摘要 PURPOSE:To unnecessitate the process of precise mask alignment, and to contrive to secure the gate-source withstand voltage and to improve the controllability and uniformity of the gate length, by a method wherein a gate electrode is formed by self-alignment with source-drain electrodes, and the source-drain electrodes are formed by self-alignment with source-drain regions. CONSTITUTION:The titled device is made of the nitride or silicide of a transition metal excellent in thermal stability. A T-type gate 301 is obtained by side- etching the first metallic layer 3. Next, high concentration ion-implanted regions 8, 9 are obtained by implanting ions 7 serving as the N type impurity with the mask of the T-type gate 301 and the second insulation film 35 on its side wall; thereafter, a source region 18 and a drain region 19 are obtained by heat treatment. Then, an ohmic metallic layer 104 is adhered, and a source electrode 38 and a drain electrode 39 are formed, thereby obtaining a FET113 having the T-type gate.
申请公布号 JPS61117869(A) 申请公布日期 1986.06.05
申请号 JP19840238520 申请日期 1984.11.14
申请人 TOSHIBA CORP 发明人 MURATA EIJI;YAMAGISHI HARUO
分类号 H01L29/812;H01L21/285;H01L21/338;H01L29/423 主分类号 H01L29/812
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