| 摘要 |
PURPOSE:To shorten the time for reading and to make high-speed operation possible by accessing each bit line by two kinds of precharge pulses alternately. CONSTITUTION:When an address is indefinite, a precharge pulse PC0 is 'L' and a pMOSTQ7 becomes conductive, and a bit line BL0 is precharged to 'H'. When an address is decided and a memory cell C1 is selected, the pulse PC0 becomes 'H', and the Q7 becomes non-conductive. At the same time, a pulse PC1 becomes 'L', and Q8 becomes conductive, and a line BL1 is precharged to 'H'. Then, the word line WL10 of a cell C1 becomes 'H', and an nMOSTQ5 in the cell C1 conducts and the potential of a line BL0 is detected by a reading circuit. Thus, by accessing lines BL0, BL1 alternately, erasing of another bit line is made at the time of reading of one bit line. |
