发明名称 ID CODE ADDING SYSTEM
摘要 PURPOSE:To allow the release of shift clock functions only to a due case by adding a hardware patch circuit to a device to decide whether or not the value allocated to a ROM within an area for ID is used. CONSTITUTION:Device hardware receives a read command from software and checks the state of a hardward patch circuit 4. If the circuit 4 is set in an enable state, access is given to an area for ID of a ROM2 to use the ID value stored in the ROM2 as an ID of the device. Then the stored value is read out and sent to the software. When the circuit 4 is set in a disable state, no access is given to the ID area of the ROM2. The prescribed value is sent to the software. The software is produced so that the ID value of the device is set at the global value under the working conditions of the device or at the value inherent to the device for its own original working. Thus the desired sofr clock function is realized.
申请公布号 JPS6115253(A) 申请公布日期 1986.01.23
申请号 JP19840135967 申请日期 1984.06.30
申请人 TOSHIBA KK 发明人 OONUKI TOSHIKIYO
分类号 G06F12/14;G06F9/06;G06F21/22;G06F21/24 主分类号 G06F12/14
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