| 摘要 |
PURPOSE:To attain a power saving operation by providing a control code coincident circuit including error permission so as to eliminate the need for the operation of an error correction circuit at each time after the detection of a start pattern. CONSTITUTION:A serial data is inputted to a bit synchronism circuit 11, where a synchronous clock is generated. Then the serial data is sampled by the synchronous clock and inputted to a start pattern coincidence detection section 12, where the coincidence with the start pattern is discriminated every time [1] bit of serial data is inputted. When the patter is coincident with the start pattern, the serial data uses the same synchronous clock and is inputted to a control code coincidence detection circuit 16 including an error permission circuit 17. In the circuit 16, the coincidence between the control code of [n]-bit in succession to the start pattern and the pattern allowed for error is detected. When the control 1 code is coincident with the error allowable pattern, the electric power of a serial data storage circuit 14 and an error correction circuit 15 is applied, and when they are dissident, no application state of power supply is kept.
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