发明名称 |
Interruptable voltage-controlled oscillator and phase-locked loop using same |
摘要 |
The fall-time of an ECL gate is precisely controlled using a fixed capacitor, which is connected between the positive supply voltage and the ECL gate output terminal, and a variable current source connected between ground and the ECL gate output terminal. A time-delay circuit is obtained by controlling the variable current source with an error voltage of a phase-locked loop such that the time-delay precisely tracks the frequency of the reference signal for the phase-locked loop. A signal detector circuit is obtained by combining time-delay circuits. A voltage-controlled oscillator is assembled by connecting 3 ECL gates with controlled fall-times in a ring oscillator configuration. Addition of a non-inverting input to one ECL gate makes the voltage-controlled oscillator interruptible. Combining a voltage-controlled oscillator of the type described with a phase detector fed by a reference signal provides a phase-locked loop with the control voltage thereof providing a frequency-to-voltage conversion function. A system for providing a receiver clock reference signal from a received signal is provided by phase-locking the output signal of a first phase-locked loop to a system reference signal to generate a first-loop control voltage. A second phase-locked loop is phase-locked to the received signal with a second-loop control voltage. In addition, the second phase-locked loop is also frequency-locked to the system reference signal by the first-loop control voltage. This system is particularly useful for recovering a receiver clock reference from a Manchester-encoded signal.
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申请公布号 |
US4565976(A) |
申请公布日期 |
1986.01.21 |
申请号 |
US19830520876 |
申请日期 |
1983.08.05 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
CAMPBELL, DAVID L. |
分类号 |
H03B5/02;G01R29/02;H03K3/03;H03K3/282;H03K3/70;H03K5/00;H03K9/06;H03K19/086;H03L7/07;H03L7/08;H03L7/099;H03M5/12;H04L25/49;(IPC1-7):H03B1/00 |
主分类号 |
H03B5/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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