| 摘要 |
PURPOSE:To decrease the number of instruction steps and to shorten the executing time with an information processor, by providing a numerical constant generating circuit and a logical data generating circuit and producing numerical data and logical data independently of each other with designation of a numerical data field. CONSTITUTION:Integer data is produced by a numerical constant generating circuit 205 as long as a bit position 16 in an S1 field of a 32-bit instruction register 202 is equal to 0. If the position 16 is equal to 1, an arithmetic register 203 designates one of 128 registers. Thus these produced contents mean the 1st operand and supplied to an operator 207 via a selection circuit 210. Then the logical data is produced by a logical data generating circuit 206 as long as a bit position 24 in an S2 field is equal to 0. While one of 128 arithmetic registers 203 is designated when the position 24 is equal to 1. These produced contents mean the 2nd operand of an instruction. This operand is supplied to an operator 207 via a selection circuit 211. Then an operation is carried out as designated by an instruction code. |
