发明名称 CONTROL MEMORY SYSTEM
摘要 PURPOSE:To attain a subroutine call of an optional multiplex degree with a small quantity of hardware by saving a return destination address at a part of a control memory which holds a microinstruction word. CONSTITUTION:When a new subroutine is called at the inside of a subroutine, a return destination address sent from the present level is saved in the address field of a microinstruction word following another microinstruction word showing the subroutine call within a control memory 1. Then the return destination address given from a called subroutine is set to a return address holding means 5. While the return destination address held by the means 5 is used to extract the return destination microinstruction word and saved in the address field of the corresponding microinstruction word in case a subroutine of an upper level is returned to that of a lower level. Then the return destination address to be given to a subroutine of a lower level is sent back to the means 5.
申请公布号 JPS6198444(A) 申请公布日期 1986.05.16
申请号 JP19840219668 申请日期 1984.10.19
申请人 NEC CORP 发明人 SHIMODA WATARU
分类号 G06F9/22;G06F9/26 主分类号 G06F9/22
代理机构 代理人
主权项
地址