| 摘要 |
PURPOSE:To omit a D/A converter having high resolution by executing prescribed digital processing by a delay circuit and a reversible counter to find out a speed detecting signal and adding the speed detecting signal to a speed command value to obtain a speed error signal. CONSTITUTION:An one-way pulse is inputted from a pulse detector 7 to a positive terminal of a counter 15 through an OR circuit 13 and a pulse delayed by a shift register 11 is inputted to a negative terminal through an OR circuit 14. Consequently, the counter 15 executes counting up/down operation and outputs a digital speed signal 108. The signal is inputted to a terminal B of an adder 17 and its input position is shifted by a factor unit 16 to weight a positional loop. A digital position error signal 110 is inputted from a counter 3 to a terminal A of the adder 17. The adder 17 subtracts the signal 108 from the signal 110 and applies a signal 111 to a D/A converter 4. |
