发明名称 MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To reduce a sheet resistance value by forming a thin metal layer which reacts with a silicon oxide film on a semiconductor region and forming a silicide layer through formation of a thick metal layer which does not react with silicon oxide film. CONSTITUTION:An n type impurity is doped to a semiconductor substrate 1 and semiconductor regions 6a and 6b are formed by thermal diffusion. Thereafter, a metal layer such as Ti, Pt, Pa or Hf is formed on the semiconductor region 6b, GL and field insulation film 2. Heat processing is carried out, causing the silicon oxide film to react with a metal layer such as Ti and causing the metal to react with semiconductor region 6b and GL, in order to form a conductive layer 10a. Moreover, a conductive layer 11a is formed by reaction with the gate electrode 5, word line WL and metal layer. A metal layer such as Mo, W, Ta which shows lower reaction rate with silicon than that of Ti is formed on the conductive layers 10a, 11a, side wall 12 and field insulation film 2. The conductive layers 10a, 11a are formed by heat processing and the conductive layer 10b, 11b are formed by reaction between semiconductor substrate 1 and silicon in the gate electrode 5. Thereby, a sheet resistance value can be reduced.
申请公布号 JPS6195550(A) 申请公布日期 1986.05.14
申请号 JP19840216196 申请日期 1984.10.17
申请人 HITACHI LTD 发明人 KANEKO HIROKO;KOYANAGI MITSUMASA
分类号 H01L29/78;H01L21/768;H01L21/8246;H01L27/10;H01L27/112 主分类号 H01L29/78
代理机构 代理人
主权项
地址