发明名称 SEMICONDUCTOR MEMORY
摘要 PURPOSE:To increase extremely the scroll operating speed, etc. of a picture processing memory by providing a transfer mode to select an optional word line and to read the information on all cells on a word line onto each bit line and then selecting other word lines to write the data on each bit line to all cells of other word lines. CONSTITUTION:An added transfer enable signal generating circuit GEN sets a transfer enable signal TE at H to inhibit the actions of bit line resetting circuits BR0-BR511 when a transfer signal -TR is set at L, i.e., a shift command of data is given for each word line. For instance, transistors Q7 and Q8 are cut off or the signal TE is sent to a generating circuit for signal phiBR to inhibit the generation of the signal phiBR for a period TE=H. At the same time, a column decoder CD is set under an inactive state in the same period to avoid selection of columns. In other words, no precharge is pesrformed by the circuits BR0-BR511 in a reading cycle nor no selection of columns is carried out by the decoder CD.
申请公布号 JPS6194290(A) 申请公布日期 1986.05.13
申请号 JP19840215866 申请日期 1984.10.15
申请人 FUJITSU LTD 发明人 TAKEMAE YOSHIHIRO
分类号 G11C7/00;G11C8/04;G11C11/401;H01L27/10 主分类号 G11C7/00
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